8-BIT & 12-BIT PROGRAMMABLE PULSE GENERATORS

3D3608R-200K is a sub package of 3D3608,If you need see the description,please click 3D3608 .If you need 3D3608R-200K's datasheet,please download it from below. By Data Delay Devices, Inc.
Part Manufacturer Description Datasheet Samples
R0E000200KCT00 Renesas Electronics Corporation On-chip debugging emulator for RX, RL78, RH850, V850, 78K0R, 78K0, and R8C Family. In addition to the debugging functions supported by E1, the E20 provides enhanced trace functions, Real-time RAM monitor functions and other functions as well. Also available as a flash memory programmer.
As for MCUs other than RX600 or RX700 Series, the available debugging function corresponds to that of E1 Emulator.
R5F64200KFB Renesas Electronics Corporation 32-BIT, FLASH, 64MHz, MICROCONTROLLER, PQFP100, 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
HCS11KMSR Renesas Electronics Corporation $ 3 Micron Radiation Hardened SOS CMOS $ Total Dose 200K or 1 Mega-RAD(Si) $ Dose Rate Upset >1010 RAD(Si)/s 20ns Pulse $ Cosmic Ray Upset Immunity < 2 x 10-9 Errors/Gate Day (Typ) $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55oC to +125oC $ Significant Power Reduction Compared to LSTTL ICs $ DC Operating Voltage Range: 4.5V to 5.5V $ Input Logic Levels $$ VIL = 30% of VCC Max $$ VIH = 70% of VCC Min $ Input Current Levels Ii ≤ 5µA at VOL, VOH
HCS11DMSR Renesas Electronics Corporation $ 3 Micron Radiation Hardened SOS CMOS $ Total Dose 200K or 1 Mega-RAD(Si) $ Dose Rate Upset >1010 RAD(Si)/s 20ns Pulse $ Cosmic Ray Upset Immunity < 2 x 10-9 Errors/Gate Day (Typ) $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55oC to +125oC $ Significant Power Reduction Compared to LSTTL ICs $ DC Operating Voltage Range: 4.5V to 5.5V $ Input Logic Levels $$ VIL = 30% of VCC Max $$ VIH = 70% of VCC Min $ Input Current Levels Ii ≤ 5µA at VOL, VOH
HCS32HMSR Renesas Electronics Corporation $ 3 Micron Radiation Hardened SOS CMOS $ Total Dose 200k RAD (Si) $ SEP Effective LET No Upsets: >100 MEV-cm2/mg $ Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55°C to +125°C $ Significant Power Reduction Compared to LSTTL ICs $ 3 Micron Radiation Hardened SOS CMOS $ Total Dose 200k RAD (Si) $ SEP Effective LET No Upsets: >100 MEV-cm2/mg $ Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55°C to +125°C $ Significant Power Reduction Compared to LSTTL ICs $ DC Operating Voltage Range: 4.5V to 5.5V $ Input Logic Levels $ VIL = 30% of VCC Max $ VIH = 70% of VCC Min $ Input Current Levels Ii ≤ 5µA @ VOL, VOH
HCS32DMSR Renesas Electronics Corporation $ 3 Micron Radiation Hardened SOS CMOS $ Total Dose 200k RAD (Si) $ SEP Effective LET No Upsets: >100 MEV-cm2/mg $ Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55°C to +125°C $ Significant Power Reduction Compared to LSTTL ICs $ 3 Micron Radiation Hardened SOS CMOS $ Total Dose 200k RAD (Si) $ SEP Effective LET No Upsets: >100 MEV-cm2/mg $ Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55°C to +125°C $ Significant Power Reduction Compared to LSTTL ICs $ DC Operating Voltage Range: 4.5V to 5.5V $ Input Logic Levels $ VIL = 30% of VCC Max $ VIH = 70% of VCC Min $ Input Current Levels Ii ≤ 5µA @ VOL, VOH
HCS32KMSR Renesas Electronics Corporation $ 3 Micron Radiation Hardened SOS CMOS $ Total Dose 200k RAD (Si) $ SEP Effective LET No Upsets: >100 MEV-cm2/mg $ Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55°C to +125°C $ Significant Power Reduction Compared to LSTTL ICs $ 3 Micron Radiation Hardened SOS CMOS $ Total Dose 200k RAD (Si) $ SEP Effective LET No Upsets: >100 MEV-cm2/mg $ Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55°C to +125°C $ Significant Power Reduction Compared to LSTTL ICs $ DC Operating Voltage Range: 4.5V to 5.5V $ Input Logic Levels $ VIL = 30% of VCC Max $ VIH = 70% of VCC Min $ Input Current Levels Ii ≤ 5µA @ VOL, VOH
HCS163DMSR Renesas Electronics Corporation $ 3 Micron Radiation Hardened CMOS SOS $ Total Dose 200K RAD (Si) $ SEP Effective LET No Upsets: >100 MEV-cm2/mg $ Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) $ Dose Rate Survivability: >1 x 1012 RAD (Si)/s $ Dose Rate Upset: >1010 RAD (Si)/s 20ns Pulse $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55oC to +125oC $ Significant Power Reduction Compared to LSTTL ICs $ DC Operating Voltage Range: 4.5V to 5.5V $ Input Logic Levels $$ VIL = 30% of VCC $$ VIH = 70% of VCC $ Input Current Levels Ii ≤ 5µA at VOL, VOH
HCS00KMSR Renesas Electronics Corporation $ 3 Micron Radiation Hardened SOS CMOS $ Total Dose 200K RAD (Si) $ SEP Effective LET No Upsets: >100 MEV-cm2/mg $ Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) $ Dose Rate Survivability: >1 x 1012 RAD (Si)/s $ Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse $ Cosmic Ray Upset Immunity < 2 x 10-9 Errors/Gate Day (Typ) $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55oC to +125oC $ Significant Power Reduction Compared to LSTTL ICs $ DC Operating Voltage Range: 4.5V to 5.5V $ Input Logic Levels $$ VIL = 30% of VCC Max $$ VIH = 70% of VCC Min $ Input Current Levels Ii ≤ 5µA at VOL, VOH
HCS109KMSR Renesas Electronics Corporation $ 3 Micron Radiation Hardened SOS CMOS $ Total Dose 200K RAD (Si) $ SEP Effective LET No Upsets: >100 MEV-cm2/mg $ Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) $ Dose Rate Survivability: >1 x 1012 RAD (Si)/s $ Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse $ Cosmic Ray Upset Immunity < 2 x 10-9 Errors/Bit-Day (Typ) $ Latch-Up Free Under Any Conditions $ Military Temperature Range: -55oC to +125oC $ Significant Power Reduction Compared to LSTTL ICs $ DC Operating Voltage Range: 4.5V to 5.5V $ Input Logic Levels $$ VIL = 30% of VCC Max $$ VIH = 70% of VCC Min $ Input Current Levels Ii ≤ 5µA at VOL, VOH
3D3608 's Packages3D3608R-200K 's pdf datasheet
3D3608R-0.25
3D3612W-0.25
3D3608R-0.5
3D3612W-0.5
3D3608R-1
3D3612W-1
3D3608R-2
3D3612W-2
3D3608R-5
3D3612W-5
3D3608R-10
3D3612W-10
3D3608R-20
3D3612W-20
3D3608R-50
3D3612W-50
3D3608R-100
3D3612W-100
3D3608R-200
3D3612W-200
3D3608R-500
3D3612W-500
3D3608R-1K
3D3612W-1K
3D3608R-2K
3D3612W-2K
3D3608R-5K
3D3612W-5K
3D3608R-10K
3D3612W-10K
3D3608R-20K
3D3612W-20K
3D3608R-50K
3D3612W-50K
8-BIT-
3D3608R-100K
3D3608R-200K
3D3608R-500K
3D3608R-750K




3D3608R-200K Pinout, Pinouts
3D3608R-200K pinout,Pin out
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