The 3D7110 10-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single Delay Line tapped and buffered at 10 points spaced uniformly in time. Tap-to-tap (incremental) delay values CAN range from 0.75ns through 8.0ns. The input is reproduced at the outputs without inversion, shifted in time as per the user-specified dash number. The 3D7110 is TTL- and CMOS- compatible, capable of driving ten 74LS-type loads, and features both rising- and falling-edge accuracy. By Data Delay Devices, Inc.
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3D7110 Pinout, Pinouts
3D7110 pinout,Pin out
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