Dual D-Type Positive Edge-Triggered Flip-Flop

The 54ACT74 is a dual D-type Flip-Flop with Asynchronous Clear and Set inputs and complementary (Q, Q#) outputs. Information at the input is transferred to the outputs on the positive edge of the Clock pulse. Clock triggering occurs at a voltage level of the Clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.
Asynchronous Inputs:
LOW input to S#D (Set) sets Q to HIGH level
LOW input to C#D (Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on C#D and S#D makes both Q and Q#
By National Semiconductor Corporation
Part Manufacturer Description Datasheet Samples
SNJ54ACT74W Texas Instruments Dual Positive-Edge-Triggered D-type Flip-Flops With Clear And Preset 14-CFP -55 to 125
SNJ54ACT74J Texas Instruments Dual Positive-Edge-Triggered D-type Flip-Flops With Clear And Preset 14-CDIP -55 to 125
CD54ACT74F3A Texas Instruments Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-CDIP -55 to 125
SNJ54ACT74FK Texas Instruments Dual Positive-Edge-Triggered D-type Flip-Flops With Clear And Preset 20-LCCC -55 to 125
54ACT74 's Packages54ACT74 's pdf datasheet
JM54ACT74SZA-RH




54ACT74 Pinout, Pinouts
54ACT74 pinout,Pin out
This is one package pinout of 54ACT74,If you need more pinouts please download 54ACT74's pdf datasheet.

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