Octal D-Type Flip-Flop With Clock Enable

The FCT377 has eight edge-triggered, D-type Flip-Flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all Flip-Flops simultaneously, when the Clock Enable (CE) is LOW. The Register is fully edge-triggered. The state of each D in- put, one setup time before the LOW-to-HIGH Clock transi- tion, is transferred to the corresponding Flip-Flops Q output. The CE input must be stable only one setup time prior to the LOW-to-HIGH Clock transition for predictable operation. By National Semiconductor Corporation
Part Manufacturer Description Datasheet Samples
54FCT377T-000 Integrated Device Technology Inc -,
54FCT377ALB Integrated Device Technology Inc LCC-20, Tube
54FCT377DB Integrated Device Technology Inc CDIP-20, Tube
54FCT377-000 Integrated Device Technology Inc -,
CY54FCT377CTLMB Texas Instruments Octal D-Type Flip-Flops with Enable 20-LCCC -55 to 125
54FCT377 's Packages54FCT377 's pdf datasheet

54FCT377 Pinout, Pinouts
54FCT377 pinout,Pin out
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