74ABT544 Octal Latched Transceiver With Dual Enable; Inverting; 3-state

The 74ABT544 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT544 octal latched transceiver contains two sets of D-type Latches for temporary storage of data flowing in either direction. Separate latch enable (LEAB and LEBA) and output enable (OEAB and OEBA) inputs are provided for each Register to permit independent control of data transfer in either direction. The outputs are guaranteed to sink 64 mA. The 74ABT544 contains two sets of eight D-type Latches with separate control pins for each set. Using data flow from A to B as an example, when the A-to-B enable (EAB) input and the A-to-B latch enable (LEAB) input are LOW, the A-to-B path is transparent. A subsequent LOW-to-HIGH transition of the LEAB signal puts the A data into the Latches where it is stored and the B outputs no longer change with the A inputs. With EAB and OEAB both LOW, the 3-state B output Buffers are active and invert the data present at the outputs of the A Latches Control of data flow from B to A is similar, but using the EBA, LEBA and OEBA inputs.
By NXP Semiconductors
74ABT544 's Packages74ABT544 's pdf datasheet
74ABT544D
74ABT544DB SSOP
74ABT544PW TSSOP




74ABT544 Pinout, Pinouts
74ABT544 pinout,Pin out
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