74ABT648 Octal Transceiver/register; Inverting; 3-state

The 74ABT648 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT648 transceiver Register consists of Bus Transceiver circuits with inverting 3-state outputs, D-type Flip-Flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal Registers Data on the A or B bus will be clocked into the Registers as the appropriate Clock pin goes HIGH. Output enable (OE) and direction (DIR) pins are provided to control the transceiver function. In the transceiver mode, data present at the high-impedance port may be stored in either the A or B Register or both. The select (SAB, SBA) pins determine whether data is stored or transferred through the device in real time. The DIR determines which bus will receive data when the OE is active (LOW). In the isolation mode (OE = HIGH), data from bus A may be stored in the B Register and/or data from bus B may be stored in the A Register Outputs from real time or stored Registers will be inverted. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses A or B may be driven at a time.
By NXP Semiconductors