74AHC125; 74AHCT125 Quad Buffer/line Driver; 3-state

The 74AHC125; 74AHCT125 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74AHC125; 74AHCT125 provides four non-inverting Buffer Line Drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high-impedance OFF-state. The 74AHC125; 74AHCT125 is identical to the 74AHC126; 74AHCT126 but has active LOW enable inputs.
By NXP Semiconductors