74AHC377; 74AHCT377 Octal D-type Flip-flop With Data Enable; Positive-edge Trigger

The 74AHC/AHCT377 D-type Flip-Flops are high-speed silicon-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.The 74AHC/AHCT377 devices have eight edge-triggered, D-type Flip-Flops with individual D inputs and Q outputs. A common Clock (CP) input loads all Flip-Flops simultaneously when the data enable (E) is LOW. The state of each D input, one set-up time before the LOW-to-HIGH Clock transition, is transferred to the corresponding output (Qn) of the Flip-Flop The E input must be stable only one set-up time prior to the LOW-to-HIGH transition for predictable operation.
By NXP Semiconductors
74AHC377D 's Packages74AHC377D 's pdf datasheet
74AHC377PW TSSOP
74AHCT377D SO
74AHCT377PW TSSOP




74AHC377D Pinout will be updated soon..., now you can download the pdf datasheet to check the pinouts !
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