74ALVT16899 2.5 V / 3.3 V 18-bit Latched Transceiver With 16-bit Parity Generator/checker (3-State)

The 74ALVT16899 is a high-performance BiCMOS product designed for VCC operation at 2.5V or 3.3V with I/O compatibility up to 5V. The 74ALVT16899 is a 16-bit to 16-bit parity transceiver with separate transparent Latches for the A bus and B bus. Either bus CAN generate or check parity. The parity bit CAN be fed-through with no change or the generated parity CAN be substituted with the SEL input.The 74ALVT16899 features independent latch enables for the A and B bus Latches a select pin for ODD/EVEN parity, and separate error signal output pins for checking parity.FUNCTIONAL DESCRIPTION:The 74ALVT16899 has three principal modes of operation which are outlined below. All modes apply to both the A-to-B and B-to-A directions.Transparent latch, Generate parity, Check A and B bus parity: Bus A (B) communicates to Bus B (A), parity is generated and passed on to the B (A) Bus as BPAR (APAR). If LEA and LEB are High and the Mode Select (SEL) is Low, the parity generated from A0-A7 and B0-B7 CAN be checked and monitored by ERRA and ERRB. Transparent latch, Feed-through parity, Check A and B bus parity: Bus A (B) communicates to Bus B (A) in a feed-through mode if SEL is High. Parity is still generated and checked as ERRA and ERRB and CAN be used as an interrupt to signal a data/parity bit error to the CPU.Latched input, Generate/Feed-through parity, Check A (and B) bus parity: Independent latch enables (LEA and LEB) allow other permutations of:Transparent latch/1 bus latched/both buses latchedFeed-through parity/generate parityCheck in bus parity/check out bus parity/check in and out bus parity
By NXP Semiconductors
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74ALVT16899 Pinout, Pinouts
74ALVT16899 pinout,Pin out
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