74AUP2G126 Low-power Dual Buffer/line Driver; 3-state

The 74AUP2G126 provides the dual non-inverting Buffer Line Driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A LOW level at pin nOE causes the output to assume a high-impedance OFF-state. This device has the input-disable feature, which allows floating input signals. The inputs are disabled when the output enable input nOE is LOW. Schmitt Trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
By NXP Semiconductors
Part Manufacturer Description Datasheet Samples
SN74AUP2G126DCUR Texas Instruments Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-VSSOP -40 to 85
SN74AUP2G126YZPR Texas Instruments Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-DSBGA -40 to 85
SN74AUP2G126YFPR Texas Instruments Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-DSBGA -40 to 85
SN74AUP2G126DQER Texas Instruments Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-X2SON -40 to 85
SN74AUP2G126RSER Texas Instruments Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-UQFN -40 to 85
74AUP2G126 's Packages74AUP2G126 's pdf datasheet
74AUP2G126DC VSSOP
74AUP2G126GM XQFN
74AUP2G126GT XSON




74AUP2G126 Pinout, Pinouts
74AUP2G126 pinout,Pin out
This is one package pinout of 74AUP2G126,If you need more pinouts please download 74AUP2G126's pdf datasheet.

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