74AUP2G157 Low-power 2-input Multiplexer

The 74AUP2G157 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt Trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF . The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP2G157 is a single 2-input multiplexer which select data from two data inputs (I0 and I1) under control of a common data select input (S). The state of the common data select input determines the particular Register from which the data comes. The output (Y, Y) presents the selected data in the true (non-inverted) and complement form. The enable input (E) is active LOW. When E is HIGH, the output Y is forced LOW and the output Y is forced HIGH regardless of all other input conditions.
By NXP Semiconductors
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74AUP2G157DC VSSOP
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74AUP2G157 Pinout, Pinouts
74AUP2G157 pinout,Pin out
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