74AUP2G241 Low-power Dual Buffer/line Driver; 3-state

The 74AUP2G241 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt Trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF . The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP2G241 provides the dual non-inverting Buffer Line Driver with 3-state output. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW level at pin 2OE causes output 2Y to assume a high-impedance OFF-state. This device has the input-disable feature, which allows floating input signals. The input 1A is disabled when the output enable input 1OE is HIGH. The input 2A is disabled when the output enable input 2OE is LOW.
By NXP Semiconductors