74AUP2G38 Low-power Dual 2-input NAND Gate (open-drain)

The 74AUP2G38 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt Trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF . The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP2G38 provides the dual 2-input NAND Gate with open-drain output. The output of the device is an open drain and CAN be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
By NXP Semiconductors
74AUP2G38 's Packages74AUP2G38 's pdf datasheet
74AUP2G38DC VSSOP
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74AUP2G38 Pinout, Pinouts
74AUP2G38 pinout,Pin out
This is one package pinout of 74AUP2G38,If you need more pinouts please download 74AUP2G38's pdf datasheet.

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