Octal D Flip-Flop With Clock Enable

The F377 has eight edge-triggered, D-type Flip-Flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all Flip-Flops simultaneously, when the Clock Enable (CE) is LOW. The Register is fully edge-triggered. The state of each D in- put, one setup time before the LOW-to-HIGH Clock tran- sition, is transferred to the corresponding Flip-Flops Q out- put. The CE input must be stable only one setup time prior to the LOW-to-HIGH Clock transition for predictable opera- tion. By National Semiconductor Corporation
Part Manufacturer Description Datasheet Samples
SN74F377ADW Texas Instruments Octal D-Type Flip-Flop With Clock Enable 20-SOIC 0 to 70
SN74F377ADWG4 Texas Instruments Octal D-Type Flip-Flop With Clock Enable 20-SOIC 0 to 70
SN74F377ADWE4 Texas Instruments F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, PLASTIC, SO-20
SN74F377ADWR Texas Instruments Octal D-Type Flip-Flop With Clock Enable 20-SOIC 0 to 70
SN74F377ADWRG4 Texas Instruments F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SO-20
SN74F377AN Texas Instruments Octal D-Type Flip-Flop With Clock Enable 20-PDIP 0 to 70
SN74F377ANE4 Texas Instruments F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20, 0.300 INCH, PLASTIC, DIP-20
74F377 's Packages74F377 's pdf datasheet



74F377 Pinout will be updated soon..., now you can download the pdf datasheet to check the pinouts !
74F377 circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

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