74F564 Octal D Flip-flop (3-State)

The 74F564 has a broadside pinout configuration to facilitate PC board layout and allows easy Interface with Microprocessors It is an 8-bit, edge triggered Register coupled to eight 3-State output Buffers The two sections of the device are controlled independently by the Clock (CP) and Output Enable (OE) control Gates The Register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High Clock transition is transferred to the corresponding Flip-Flop s Q output.The 3-State output Buffers are designed to drive heavily loaded 3-State buses, MOS Memories or MOS Microprocessors The active Low Output Enable (OE) controls all eight 3-State Buffers independently of the Register operation. When OE is Low, data in the Register appears at the outputs. When OE is High, the outputs are in high impedance ,off, state, which means they will neither drive nor load the bus.
By NXP Semiconductors
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74F564 Pinout, Pinouts
74F564 pinout,Pin out
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