74F841/842 Bus Interface Latches

The 74F841 and 74F842 bus Interface Latches are designed to provide extra data width for wider address/data paths of buses carrying parity. The 74F841 consists of ten D-type Latches with 3-State outputs. The Flip-Flops appear transparent to the data when Latch Enable (LE) is HIGH. This allows asynchronous operation, as the output transition follows the data in transition. On the LE HIGH-to-LOW transition, the data that meets the set-up and hold time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH the output is in the high-impedance state. The 74F842 is the inverted output version of the 74F841.
By NXP Semiconductors
74F841 's Packages74F841 's pdf datasheet

74F841 Pinout, Pinouts
74F841 pinout,Pin out
This is one package pinout of 74F841,If you need more pinouts please download 74F841's pdf datasheet.

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