8 Output PLL Clock Generator W/3-State And TTL-Outputs

The FCT88915TT uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference Clock It provides low skew Clock distribution for high performance PCs and workstations. One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentially zero delay across the device. The PLL consists of the phase/frequency detector, charge pump, loop Filter and VCO The VCO is designed to run optimally between 20MHz and f2Q Max. By Integrated Device Technology