74HC/HCT10 Triple 3-input NAND GateThe 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function.
By NXP Semiconductors |
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| Part | Manufacturer | Description | Datasheet | Samples | |
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| SN74HC10DR-00 | Texas Instruments | HC/UH SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14 |
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| SN74HC109N-00 | Texas Instruments | HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 |
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| CD74HC10M | Texas Instruments | High Speed CMOS Logic Triple 3-Input NAND Gates 14-SOIC -55 to 125 |
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| CD74HC107EE4 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125 |
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| CD74HC109E | Texas Instruments | High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
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| CD74HC109MTG4 | Texas Instruments | HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, GREEN, PLASTIC, MS-012AC, SOIC-16 |
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| SN74HC10DRG4 | Texas Instruments | Triple 3-Input Positive-NAND Gates 14-SOIC -40 to 85 |
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| SN74HC10PW | Texas Instruments | Triple 3-Input Positive-NAND Gates 14-TSSOP -40 to 85 |
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| SN74HC10QPWREP | Texas Instruments | Enhanced Product Triple 3-Input Positive-Nand Gates 14-TSSOP -40 to 125 |
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| SN74HC109DR | Texas Instruments | Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC -40 to 85 |
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| 74HC10 Pb-Free | 74HC10 Cross Reference | 74HC10 Schematic | 74HC10 Distributor |
| 74HC10 Application Notes | 74HC10 RoHS | 74HC10 Circuits | 74HC10 footprint |
