74HC4017; 74HCT4017 Johnson Decade Counter With 10 Decoded Outputs

The 74HC4017 74HCT4017 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4017. The 74HC4017 74HCT4017 is a 5-stage Johnson decade Counter with 10 decoded active HIGH outputs (Q0 to Q9), an active LOW output from the most significant Flip-Flop (Q5-9), active HIGH and active LOW Clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). The Counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a HIGH-to-LOW transition at CP1 while CP0 is HIGH (see Table 3). When cascading Counters the Q5-9 output, which is LOW while the Counter is in states 5, 6, 7, 8 and 9, CAN be used to drive the CP0 input of the next Counter A HIGH on MR resets the Counter to zero (Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW) independent of the Clock inputs (CP0 and CP1). Automatic code correction of the Counter is provided by an internal circuit: following any illegal code the Counter returns to a proper counting mode within 11 Clock pulses.
By NXP Semiconductors