74HC/HCT4046A Phase-locked-loop With VCO

The 74HC/HCT4046A are high-speed Si-gate CMOS devices and are pin compatible with the '4046' of the '4000B' series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4046A are phase-locked-loop circuits that comprise a linear Voltage-Controlled Oscillator (VCO) and three different phase Comparators (PC1, PC2 and PC3) with a common signal input Amplifier and a common Comparator input.The signal input CAN be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input Amplifiers With a passive low-pass Filter the '4046A' forms a second-order loop PLL The excellent VCO linearity is achieved by the use of linear op-amp techniques.The VCO requires one external capacitor C1 (between C1A and C1B) and one external resistor R1 (between R1 and GND) or two external resistors R1 and R2 (between R1 and GND, and R2 and GND). Resistor R1 and capacitor C1 determine the frequency range of the VCO Resistor R2 enables the VCO to have a frequency offset if required.The high input impedance of the VCO simplifies the design of low-pass Filters by giving the designer a wide choice of resistor/capacitor ranges. In order not to load the low-pass Filter a Demodulator output of the VCO input voltage is provided at pin 10 (DEMOUT). In contrast to conventional techniques where the DEMOUT voltage is one threshold voltage lower than the VCO input voltage, here the DEMOUT voltage equals that of the VCO input. If DEMOUT is used, a load resistor (RS) should be connected from DEMOUT to GND; if unused, DEMOUT should be left open. The VCO output (VCOOUT) CAN be connected directly to the Comparator input (COMPIN), or connected via a frequency-divider. The VCO output signal has a duty factor of 50% (maximum expected deviation 1%), if the VCO input is held at a constant DC level. A LOW level at the inhibit input (INH) enables the VCO and Demodulator while a HIGH level turns both off to minimize standby power consumption. The only difference between the HC and HCT versions is the input level specification of the INH input. This input disables the VCO section. The sections of the Comparator are identical, so that there is no difference in the SIGIN (pin 14) or COMPIN (pin 3) inputs between the HC and HCT versions.
By NXP Semiconductors
Part Manufacturer Description Datasheet Samples
CD74HC4046AME4 Texas Instruments PHASE LOCKED LOOP, 38MHz, PDSO16, GREEN, PLASTIC, MS-012AC, SOIC-16
CD74HC4046APWRG4 Texas Instruments High Speed CMOS Logic Phase-Locked-Loop with VCO 16-TSSOP -55 to 125
CD74HC4046AMG4 Texas Instruments High Speed CMOS Logic Phase-Locked-Loop with VCO 16-SOIC -55 to 125
CD74HC4046APWT Texas Instruments High Speed CMOS Logic Phase-Locked-Loop with VCO 16-TSSOP -55 to 125
CD74HC4046AM96G4 Texas Instruments High Speed CMOS Logic Phase-Locked-Loop with VCO 16-SOIC -55 to 125
CD74HC4046APWRE4 Texas Instruments High Speed CMOS Logic Phase-Locked-Loop with VCO 16-TSSOP -55 to 125
CD74HC4046AMT Texas Instruments High Speed CMOS Logic Phase-Locked-Loop with VCO 16-SOIC -55 to 125
CD74HC4046APWTE4 Texas Instruments PHASE LOCKED LOOP, 38MHz, PDSO16, GREEN, PLASTIC, TSSOP-16
CD74HC4046AMTE4 Texas Instruments High Speed CMOS Logic Phase-Locked-Loop with VCO 16-SOIC -55 to 125
CD74HC4046APWTG4 Texas Instruments PHASE LOCKED LOOP, 38MHz, PDSO16, GREEN, PLASTIC, TSSOP-16
74HC4046 's Packages74HC4046 's pdf datasheet
74HC4046AD SO
74HC4046ADB SSOP
74HC4046AN DIP
74HC4046APW TSSOP
74HCT4046AD SO
74HCT4046ADB SSOP
74HCT4046AN DIP




74HC4046 Pinout, Pinouts
74HC4046 pinout,Pin out
This is one package pinout of 74HC4046,If you need more pinouts please download 74HC4046's pdf datasheet.

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