74HC73 Dual JK Flip-flop With Reset; Negative-edge Trigger

The 74HC73 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The 74HC73 is specified in compliance with JEDEC standard no. 7A. The 74HC is a dual negative-edge triggered JK Flip-Flop featuring individual J, K, Clock (nCP) and reset (nR) inputs; also complementary nQ and nQ outputs. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW Clock transition for predictable operation. The reset (nR) is an asynchronous active LOW input. When LOW, it overrides the Clock and data inputs, forcing the nQ output LOW and the nQ output HIGH. Schmitt-trigger action in the Clock input makes the circuit highly tolerant to slower Clock rise and fall times.
By NXP Semiconductors
Part Manufacturer Description Datasheet Samples
CD74HC73EE4 Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125
CD74HC73M Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125
SN74HC73D Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear 14-SOIC -40 to 85
CD74HC73E Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125
CD74HC73MTG4 Texas Instruments HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14
CD74HC73M96 Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125
SN74HC73N Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear 14-PDIP -40 to 85
CD74HC73M96E4 Texas Instruments HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14
CD74HC73ME4 Texas Instruments HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14
CD74HC73MG4 Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125
74HC73 's Packages74HC73 's pdf datasheet
74HC73D SO
74HC73DB SSOP
74HC73N DIP
74HC73PW TSSOP




74HC73 Pinout, Pinouts
74HC73 pinout,Pin out
This is one package pinout of 74HC73,If you need more pinouts please download 74HC73's pdf datasheet.

74HC73 circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

Related Electronics Part Number

Related Keywords:

74HC73 Pb-Free 74HC73 Cross Reference 74HC73 Schematic 74HC73 Distributor
74HC73 Application Notes 74HC73 RoHS 74HC73 Circuits 74HC73 footprint
Hot categories