74HC/HCT648 Octal Bus Transceiver/register; 3-state; Inverting

The 74HC/HCT648 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT648 consist of Bus Transceiver circuits with 3-state inverting outputs, D-type Flip-Flops and control circuitry arranged for multiplexed transmission of data directly from the internal Registers Data on the 'A' or 'B' bus will be clocked into the Registers as the appropriate Clock (CPAB and CPBA) goes to a HIGH Logic level. Output enable (OE) and direction (DIR) inputs are provided to control the transceiver function. In the transceiver mode, data present at the high-impedance port may be stored in either the 'A' or 'B' Register or in both. The select source inputs (SAB and SBA) CAN multiplex stored and real-time (transparent mode) data. The direction (DIR) input determines which bus will receive data when OE is active (LOW). In the isolation mode (OE = HIGH), 'A' data may be stored in the 'B' Register and/or 'B' data may be stored in the 'A' Register When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The '648' is functionally identical to the '646', but has inverting data paths.
By NXP Semiconductors
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74HCT648 Pinout, Pinouts
74HCT648 pinout,Pin out
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