74LVC1284 3.3 V Parallel Printer Interface Transceiver/bufferThe 74LVC1284 parallel Interface chip is designed to provide an
asynchronous, 4-bit, bi-directional, parallel printer Interface for
personal computers. Three additional lines are included to provide
handshaking signals between the host and the peripheral. The part
is designed to match IEEE 1284 standard.
The 4 transceiver pins (A/B 1-4) allow data transmission from the A
bus to the B bus, or from the B bus to the A bus, depending on the
state of the direction pin DIR.
The B bus and the Y5-Y7 lines have totem pole or open drain style
outputs depending on the state of the high drive enable pin HD.
The A bus only has totem pole style outputs. All inputs are TTL
compatible with at least 300mV of input hysteresis at VCC = 3.3V.
By NXP Semiconductors |
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74LVC1284 Pb-Free | 74LVC1284 Cross Reference | 74LVC1284 Schematic | 74LVC1284 Distributor |
74LVC1284 Application Notes | 74LVC1284 RoHS | 74LVC1284 Circuits | 74LVC1284 footprint |