74LVC594A 8-bit Shift Register With Output Register

The 74LVC594A is an 8-bit serial-in/serial or parallel-out Shift register with a storage Register Separate Clock and reset inputs are provided on both shift and storage Registers The input CAN be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The Shift register has a serial input (DS) and a serial output (Q7S) for cascading purposes. Data is shifted on the positive-going transitions of the SHCP input. The data in the Shift register is transferred to the storage Register on a positive-going transition of the STCP input. If both Clocks are connected together, the Shift register will always be one Clock pulse ahead of the storage Register A LOW level on one of the two Register reset pins (SHR and STR) will clear the corresponding Register
By NXP Semiconductors
74LVC594A 's Packages74LVC594A 's pdf datasheet

74LVC594A Pinout, Pinouts
74LVC594A pinout,Pin out
This is one package pinout of 74LVC594A,If you need more pinouts please download 74LVC594A's pdf datasheet.

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