74LVC646A Octal Bus Transceiver/register; 3-state

The 74LVC646A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs CAN be driven from either 3.3 V or 5 V devices. In 3-state operation, outputs CAN handle 5 V. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. The 74LVC646A consists of non-inverting Bus Transceiver circuits with 3-state outputs, D-type Flip-Flops and control circuitry arranged for multiplexed transmission of data directly from the internal Registers Data on the A or B bus will be clocked in the internal Registers as the appropriate Clock (CPAB or CPBA) goes to a HIGH Logic level. Output enable (OE) and direction (DIR) inputs are provided to control the transceiver function. In the transceiver mode, data present at high-impedance port may be stored in either the A or B Register or in both. With the select source inputs (SAB and SBA) stored and real-time (transparent mode) data CAN be multiplexed. The direction (DIR) input determines which bus will receive data when OE is active (LOW). In the isolation mode (OE = HIGH), A data may be stored in the B Register and/or B data may be stored in the A Register When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses A or B may be driven at a time.
By NXP Semiconductors