74LVT374 3.3V Octal D-type Flip-flop; Positive-edge Trigger (3-State)

The 74LVT374 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT374 is an 8-bit, edge triggered Register coupled to eight 3-State output Buffers The two sections of the device are controlled independently by the Clock (CP) and Output Enable (OE) control Gates The Register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High Clock transition, is transferred to the corresponding Flip-Flops Q output. The 3-State output Buffers are designed to drive heavily loaded 3-State buses, MOS memoriesor, MOS Microprocessors The active-Low Output Enable (OE) controls all eight 3-State Buffers independent of the Clock operation. When OE is Low, the stored data appears at the outputs. When OE is High, the outputs are in the High-impedance OFF state, which means they will neither drive nor load the bus.
By NXP Semiconductors
74LVT374 's Packages74LVT374 's pdf datasheet
74LVT374D SO

74LVT374 Pinout, Pinouts
74LVT374 pinout,Pin out
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