Low Voltage 18-Bit Universal Bus Transceivers With 3.6V Tolerant Inputs And Outputs And 26 Ohm Series Resistors In The B-Port Outputs

The 74VCX162601 , 18-bit universal Bus Transceiver combines D-type Latches and D-type Flip-Flops to allow data flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable (OEAB# and OEBA#), latch-enable (LEAB and LEBA), and Clock (CLKAB and CLKBA) inputs. The Clock CAN be controlled by the clock-enable (CLKENAB# and CLKENBA#) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a HIGH-to-LOW Logic level. If LEAB is LOW, the A bus data is stored in the latch Flip-Flop on the LOW-to-HIGH transition of CLKAB. Output-enable OEAB# is active-LOW. When OEAB# is HIGH, the outputs are in the HIGH-impedance state.
Data flow for B to A is similar to that of A to B but uses OEBA#, LEBA, CLKBA and CLKENBA#.
The 74VCX162601 is designed for low voltage (1.4V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The VCX162601 is also designed with 26ohm series resistors in the B-Port outputs. This design reduces line noise in applications such as memory address drivers, Clock Drivers and Bus Transceivers transmitters.
By Fairchild Semiconductor