Chmos 16-bit Microcontroller Corporation

The 83C196LC 83C196LD are low-cost, pin-compatible replacements for the existing 87C196JT and 87C196JR, respectively. These products feature an enhanced synchronous serial I/O (SSIO) port for more flexible Communication to other devices. The enhanced SSIO is compatible with Motorolas Serial Peripheral Interface (SPI) protocol and Nationals Microwire protocol. To optimize die size, the A/D converter was removed for use in those applications that use an off-chip A/D converter The MCS 96 Microcontroller family members are all high-performance Microcontrollers with 16-bit CPUs. The 83C196LC 83C196LD are composed of a high-speed core with the following peripherals: an asynchronous/synchronous serial I/O port (8096 compatible) with a dedicated 16-bit baud-rate generator; an additional synchronous serial I/O port with full duplex master/slave transceivers; a flexible Timer Counter structure with prescaler, cascading, and quadrature capabilities; six modularized, multiplexed high-speed I/O for capture and compare (called event processor array) with 200 ns resolution and double buffered inputs; and a sophisticated, prioritized interrupt structure with programmable peripheral transaction server (PTS). The 83C196LC has the highest memory density of the 52-pin MCS 96 Microcontroller family, with 32 Kbytes of on-chip ROM, 1 Kbyte of on-chip Register RAM, and 512 bytes of code RAM. The high memory integration of the 83C196LC supports high functionality in a low pin-count package and the use of the C programming language. By Intel Corporation
83C196LC 's Packages83C196LC 's pdf datasheet

83C196LC Pinout, Pinouts
83C196LC pinout,Pin out
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