Low Jitter, DDS-based Clock Generator And Synthesizer

The AD9540 supports a variety of functions including signal synthesis and low jitter Clock generation useful in a wide variety of applications. The device features high performance PLL circuitry including a flexible 200 MHz Phase Frequency Detector and a digitally controlled Charge Pump current. The device also provides a low jitter, 655 MHz CML mode (PECL compatible) output driver with programmable slew rates. External VCO rates up to 2.7 GHz are supported. An onboard 400 MSPS DDs provides extremely fine tuning resolution and phase programmability. Information is loaded into the AD9540 via a serial I/O port which has a device write speed of 25Mbit/sec. The AD9540 Frequency Divider block CAN also be programmed to support a spread spectrum clocking mode.
The AD9540 is specified to operate over the extended automotive range of -40C to +85C.
By Analog Devices, Inc.
AD9540 's PackagesAD9540 's pdf datasheet

AD9540 Pinout, Pinouts
AD9540 pinout,Pin out
This is one package pinout of AD9540,If you need more pinouts please download AD9540's pdf datasheet.

AD9540 circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

Related Electronics Part Number

Related Keywords:

AD9540 Pb-Free AD9540 Cross Reference AD9540 Schematic AD9540 Distributor
AD9540 Application Notes AD9540 RoHS AD9540 Circuits AD9540 footprint