155/622 Mb/s Clock And Data Recovery IC With Integrated Limiting AmpThe ADN2807 provides the receiver functions of quantization, signal level detect, and Clock and Data Recovery at rates of OC-3, OC-12, and 15/14 FEC. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for 40C to +85C ambient temperature, unless otherwise noted.
The device is intended for WDM system applications and CAN be used with either an external reference Clock or an on-chip Oscillator with external crystal. Both native rates and 15/14 rate digital wrappers are supported by the ADN2807 without any change of reference Clock
This device, together with a PIN Diode and a TIA preamplifier, CAN implement a highly integrated, low cost, low power, Fiber Optic Receiver
The receiver front end signal detect circuit indicates when the input signal level has fallen below a user adjustable threshold. The signal detect circuit has hysteresis to prevent chatter at the output.
The ADN2807 is available in a compact 7 mm 7 mm 48-lead chip-scale package (LFCSP).
By Analog Devices, Inc. |
Part | Manufacturer | Description | Datasheet | Samples | |
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ADN2807ACPZ-RL | Analog Devices | 155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp | |||
ADN2807ACPZ | Analog Devices Inc | 155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp |
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ADN2807 Pb-Free | ADN2807 Cross Reference | ADN2807 Schematic | ADN2807 Distributor |
ADN2807 Application Notes | ADN2807 RoHS | ADN2807 Circuits | ADN2807 footprint |