Multi Rate Limiting Amplifier And Clock And Data Recovery ICs

The ADN2819 provides receiver functions of Quantization, Signal Level Detect and Clock and Data Recovery at rates of OC-3, OC-12, Gigabit Ethernet OC-48 and all FEC rates. All SONET jitter requirements are met, including: Jitter Transfer; Jitter Generation; and Jitter Tolerance. All specifications are quoted for -40C to +85C ambient temperature unless otherwise noted. The proprietary delay and phase-locked loop design of the ADN2819 provides unprecedented jitter performance for robust high-speed networking designs. The device is intended for WDM system applications and CAN be used with either an external reference Clock or an on-chip crystal Oscillator Both native rates and 15/14 rate digital wrappers rates are supported by the ADN2819 without any change of reference Clock required. This device together with a PIN Diode and a TIA preamplifier CAN implement a highly integrated, low cost, low power Fiber Optic Receiver The receiver front end Signal Detect circuit indicates when the input signal level has fallen below a user adjustable threshold.
By Analog Devices, Inc.