Dsp Microcomputer Family - Analog Devices

The ADSP-21062 SHARCSuper Harvard Architecture Computeris a signal processing microcomputer that offers new capabilities and levels of performance. The ADSP-21062 SHARCs are 32-bit processors optimized for high performance DSP applications. The ADSP-21062 builds on the ADSP-21000 DSP core to form a complete system-on-a-chip, adding a dual- ported on-chip SRAM and integrated I/O peripherals supported by a dedicated I/O bus. Fabricated in a high speed, low power CMOS process, the ADSP-21062 has a 25 ns instruction cycle time and operates at 40MIPS. With its on-chip instruction cache, the processor CAN execute every instruction in a single cycle. Table I shows performance benchmarks for the ADSP-21062. The ADSP-21062 SHARC represents a new standard of inte- gration for signal computers, combining a high performance floating-point DSP core with integrated, on-chip system features including a 2 Mbit SRAM memory (4 Mbit on the ADSP-21060), host processor Interface DMA controller, serial ports and link port and parallel bus connectivity for glueless DSP multiprocessing. By Analog Devices, Inc.