ECL/PECL Oscillator Gain Stage & Buffer With Selectable Enable

The AZ100LVEL16VT is a specialized Oscillator gain stage with high gain output Buffer including an enable. The QHG/Q HG outputs have a voltage gain several times greater than the Q/Q outputs. The AZ100LVEL16VTL and provide a selectable enable input (EN) that allows continuous Oscillator operation. See truth table for the Enable function. If Enable pull-up is desired in the CMOS/TTL mode, an external 20 k resistor connecting EN to VCC will override the on-chip pull-down resistor. When disabled, the QHG output is forced high and the Q HG output is forced low. The AZ100LVEL16VTL also provides a VBB and 470 internal bias resistors from D to VBB and D to VBB. The VBB pin CAN support 1.5 mA sink/source current. Bypassing VBB to ground with a 0.01 F capacitor is recommended. The outputs Q and Q each have a selectable on-chip pull-down current source. See truth table below for current source functions. External resistors may also be used to increase pull-down current to a maximum total of 25 mA. By Arizona Microtek, Inc.