ECL/PECL Oscillator Gain Stage & Buffer With Selectable Enable

The AZ100LVEL16VT is a specialized Oscillator gain stage with high gain output Buffer including an enable. The QHG/Q HG outputs have a voltage gain several times greater than the Q/Q outputs. The AZ100LVEL16VTL and provide a selectable enable input (EN) that allows continuous Oscillator operation. See truth table for the Enable function. If Enable pull-up is desired in the CMOS/TTL mode, an external 20 k resistor connecting EN to VCC will override the on-chip pull-down resistor. When disabled, the QHG output is forced high and the Q HG output is forced low. The AZ100LVEL16VTL also provides a VBB and 470 internal bias resistors from D to VBB and D to VBB. The VBB pin CAN support 1.5 mA sink/source current. Bypassing VBB to ground with a 0.01 F capacitor is recommended. The outputs Q and Q each have a selectable on-chip pull-down current source. See truth table below for current source functions. External resistors may also be used to increase pull-down current to a maximum total of 25 mA. By Arizona Microtek, Inc.
AZ100LVEL16VT 's PackagesAZ100LVEL16VT 's pdf datasheet
AZ100LVEL16VTNA
AZ100LVEL16VTNA-
AZ100LVEL16VTNB
AZ100LVEL16VTNB-
AZ100LVEL16VTNC
AZ100LVEL16VTNC-
AZ100LVEL16VTND
AZ100LVEL16VTND-
AZ100LVEL16VTL
AZ100LVEL16VTL-




AZ100LVEL16VT Pinout, Pinouts
AZ100LVEL16VT pinout,Pin out
This is one package pinout of AZ100LVEL16VT,If you need more pinouts please download AZ100LVEL16VT's pdf datasheet.

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AZ100LVEL16VT Application Notes AZ100LVEL16VT RoHS AZ100LVEL16VT Circuits AZ100LVEL16VT footprint
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