Broadcom Corporation - BCM8702 - Serial 10-GbE Transceiver With XAUI™ Interface

The BCM8702 Ethernet LAN PHY is a fully integrated serialization/deserialization (10.3125 Gbps) Interface device performing the extension functions for a 10.3125 Gbps Serial Ethernet Reconciliation Sublayer (RS) Interface The XGXS, PCS, and PMA functions include 8B/10B coding, 64B/66B coding, SerDes, Clock Multiplication Unit (CMU), and Clock and Data Recovery (CDR). On-chip Clock synthesis is performed by the high frequency, low-jitter, phase-locked loops for the PMD and XAUI output retimers. Individual PMD and XAUI Clock recovery is performed on the device by synchronizing the on-chip VCOs directly to their respective incoming data streams. Elastic Buffers allow the XAUI and PMD Interfaces to operate in either a synchronous or asynchronous configuration. An external 156.25- MHz VCXO is required for synchronous mode operation or for asynchronous mode with Clock cleanup.
By Broadcom Corp.
BCM8702 's PackagesBCM8702 's pdf datasheet



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BCM8702 Application circuits
BCM8702 circuits
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