Rad-Hard CMOS Dual J-K Master-Slave Flip-Flop

CD4027BMS is a single monolithic chip integrated circuit containing two identical complementary-symmetry J-K masterslave Flip-Flops Each Flip-Flop has provisions for individual J, K, Set Reset, and Clock input signals. Buffered Q and Q signals are provided as outputs. This input-output arrangement provides for compatible operation with the Intersil CD4013B dual D type Flip-Flop
The CD4027BMS is useful in performing control, Register and toggle functions. Logic levels present at the J and K inputs along with internal self-steering control the state of each flip- flop; changes in the Flip-Flop state are synchronous with the positive-going transition of the Clock pulse. Set and reset functions are independent of the Clock and are initiated when a high level signal is present at either the Set or Reset input.
The CD4027BMS is supplied in these 16-lead outline packages:
Braze Seal DIP H4T
Frit Seal DIP H1E
Ceramic Flatpack H6W
By Intersil Corporation
CD4027BMS 's PackagesCD4027BMS 's pdf datasheet
CD4027BKMSR




CD4027BMS Pinout, Pinouts
CD4027BMS pinout,Pin out
This is one package pinout of CD4027BMS,If you need more pinouts please download CD4027BMS's pdf datasheet.

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