8-Bit Addressable Latch

The CD4724BC is an 8-bit addressable latch with three address inputs (A0A2), an active low enable input (E), active high clear input (CL), a data input (D) and eight out- puts (Q0Q7). Data is entered into a particular bit in the latch when that is addressed by the address inputs and the enable (E) is LOW. Data entry is inhibited when enable (E) is HIGH. When clear (CL) and enable (E) are HIGH, all outputs are LOW. When clear (CL) is HIGH and enable (E) is LOW, the channel demultiplexing occurs. The bit that is addressed has an active output which follows the data input while all unaddressed bits are held LOW. When operating in the addressable latch mode (E = CL = LOW), changing more than one bit of the address could impose a transient wrong address. Therefore, this should only be done while in the memory mode (E = HIGH, CL = LOW). By Fairchild Semiconductor
CD4724BC 's PackagesCD4724BC 's pdf datasheet

CD4724BC Pinout, Pinouts
CD4724BC pinout,Pin out
This is one package pinout of CD4724BC,If you need more pinouts please download CD4724BC's pdf datasheet.

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