Dual J-K Flip-Flop With Set And Reset Positive-Edge Trigger

The HC109 and HCT109 are dual J-K ip-ops with set and reset. The ip-op changes state with the positive transition of Clock (1CP and 2CP). The ip-op is set and reset by active-low S and R, respectively. A low on both the set and reset inputs simultaneously will force both Q and Q outputs high. However, both set and reset going high simultaneously results in an unpredictable output condition. By Texas Instruments
Part Manufacturer Description Datasheet Samples
CD54HC109F3A Rochester Electronics LLC J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16,
CD54HC109F3A Texas Instruments High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125
CD54HC109 's PackagesCD54HC109 's pdf datasheet
CD54HC109F3A DIP
CD54HCT109F3A DIP




CD54HC109 Pinout, Pinouts
CD54HC109 pinout,Pin out
This is one package pinout of CD54HC109,If you need more pinouts please download CD54HC109's pdf datasheet.

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