High Speed CMOS Logic Presettable Synchronous 4-Bit Binary Up/Down Counters With Asynchronous Reset

The HC192, CD74HCT193 and HCT193 are asynchronously presettable BCD Decade and Binary Up/Down synchronous Counters respectively.
Presetting the Counter to the number on the preset data inputs (P0-P3) is accomplished by a LOW asynchronous parallel load input (PL). The Counter is incremented on the low-to-high transition of the Clock-Up input (and a high level on the Clock-Down input) and decremented on the low to high transition of the Clock-Down input (and a high level on the Clock-up input). A high level on the MR input overrides any other input to clear the Counter to its zero state. The Terminal Count up (carry) goes low half a Clock period before the zero count is reached and returns to a high level at the zero count. The Terminal Count Down (borrow) in the count down mode likewise goes low half a Clock period before the maximum count (9 in the 192 and 15 in the 193) and returns to high at the maximum count. Cascading is effected by connecting the carry and borrow outputs of a less significant Counter to the Clock-Up and CLock-Down inputs, respectively, of the next most significant Counter
If a decade Counter is present to an illegal state or assumes an illegal state when power is applied, it will return to the normal sequence in one count as s 960d hown in state diagram.
By Texas Instruments
Part Manufacturer Description Datasheet Samples
CD74HCT193E Texas Instruments High Speed CMOS Logic Presettable Synchronous 4-Bit Binary Up/Down Counters with Asynchronous Reset 16-PDIP -55 to 125
CD74HCT193EE4 Texas Instruments High Speed CMOS Logic Presettable Synchronous 4-Bit Binary Up/Down Counters with Asynchronous Reset 16-PDIP -55 to 125
CD74HCT193 's PackagesCD74HCT193 's pdf datasheet
CD74HCT193E PDIP
CD74HCT193EE4 PDIP




CD74HCT193 Pinout, Pinouts
CD74HCT193 pinout,Pin out
This is one package pinout of CD74HCT193,If you need more pinouts please download CD74HCT193's pdf datasheet.

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