1-To-8, Divide-By-2 Clock Driver With Preset And Clear
The CDC303 contains eight Flip-Flops designed to have low skew between outputs. The eight outputs (six in-phase with CLK and two out-of-phase) toggle on successive CLK pulses. Preset () and clear () inputs are provided to set the Q and Q outputs high or low independent of the Clock (CLK) input.
The CDC303 has output and pulse-skew parameters tsk(o) and tsk(p) to ensure performance as a Clock Driver when a divide-by-two function is required.
The CDC303 is characterized for operation from 0?C to 70?C.
By Texas Instruments
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