PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER

The CDCLVD110 Clock Driver distributes one pair of differential LVDs Clock inputs (either CLK0 or CLK1) to 10 pairs of differential Clock outputs (Q0, Q9) with minimum skew for Clock Distribution The CDCLVD110 is specifically designed for driving 50- transmission lines. When the control enable is high (EN = 1), the 10 differential outputs are programmable in that each output CAN be individually enabled/disabled (3-stated) according to the first 10 bits loaded into the Shift register Once the Shift register is loaded, the last bit selects either CLK0 or CLK1 as the Clock input. However, when EN = 0, the outputs are not programmable and all outputs are enabled. The CDCLVD110 is characterized for operation from 40C to 85C. By Texas Instruments
Part Manufacturer Description Datasheet Samples
CDCLVD110ARHB Texas Instruments 110 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32, GREEN, PLASTIC, QFN-32
CDCLVD110VFRG4 Texas Instruments 1-to-10 LVDS clock buffer up to 900MHz with minimum skew for clock distribution 32-LQFP -40 to 85
CDCLVD110ARHBR Texas Instruments 1-to-10 LVDS Clock Buffer up to 1100MHz with Minimum Skew for Clock Distribution 32-VQFN -40 to 85
CDCLVD110AVF Texas Instruments 1-to-10 LVDS Clock Buffer up to 1100MHz with Minimum Skew for Clock Distribution 32-LQFP -40 to 85
CDCLVD110VFR Texas Instruments 1-to-10 LVDS clock buffer up to 900MHz with minimum skew for clock distribution 32-LQFP -40 to 85
CDCLVD110ARHBTG4 Texas Instruments 1-to-10 LVDS Clock Buffer up to 1100MHz with Minimum Skew for Clock Distribution 32-VQFN -40 to 85
CDCLVD110VFG4 Texas Instruments 1-to-10 LVDS clock buffer up to 900MHz with minimum skew for clock distribution 32-LQFP -40 to 85
CDCLVD110VF Texas Instruments 1-to-10 LVDS clock buffer up to 900MHz with minimum skew for clock distribution 32-LQFP -40 to 85
CDCLVD110ARHBRG4 Texas Instruments 1-to-10 LVDS Clock Buffer up to 1100MHz with Minimum Skew for Clock Distribution 32-VQFN -40 to 85
CDCLVD110AVFRG4 Texas Instruments 1-to-10 LVDS Clock Buffer up to 1100MHz with Minimum Skew for Clock Distribution 32-LQFP -40 to 85
CDCLVD110 's PackagesCDCLVD110 's pdf datasheet



CDCLVD110 Pinout, Pinouts
CDCLVD110 pinout,Pin out
This is one package pinout of CDCLVD110,If you need more pinouts please download CDCLVD110's pdf datasheet.

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