32mb Lw R-r Hstl High Speed Synchronous Sram (1mb X 36) - Sony Corporation

The CXK77K36R320GB is a high speed CMOS synchronous static RAM with common I/O pins, organized as 1,048,576 words by 36 bits. This synchronous SRAM integrates input Registers high speed RAM, output Registers and a one-deep write Buffer onto a single monolithic IC. Register - Register (R-R) read operations and Late Write (LW) write operations are supported, pro- viding a high-performance user Interface All address and control input signals except G (Output Enable) and ZZ (Sleep Mode) are registered on the rising edge of the K differential input Clock During read operations, output data is driven valid from the rising edge of K, one full Clock cycle after the address is registered. During write operations, input data is registered on the rising edge of K, one full Clock cycle after the address is registered. Sleep (power down) capability is provided via the ZZ input signal. Output drivers are series terminated, and output impedance is programmable via the ZQ input pin. By connecting an external control resistor RQ between ZQ and VSS, the impedance of the output drivers CAN be precisely controlled. 333 MHz operation is obtained from a single 2.5V power supply. JTAG boundary scan Interface is provided using a subset of IEEE standard 1149.1 protocol. By Sony Electronics
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