9-Bit Bus Interface Flip-Flops With 3-State Outputs

This bus-interface Register is designed to eliminate the extra packages required to Buffer existing Registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT823T is a 9-bit-wide buffered Register with clock-enable (EN) and clear (CLR) inputs that are ideal for parity bus interfacing in high-performance microprogrammed systems. It is ideal for use as an output port requiring high IOL/IOH.
This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
By Texas Instruments
CY74FCT823T 's PackagesCY74FCT823T 's pdf datasheet
CY74FCT823ATPC PDIP
CY74FCT823ATPCE4 PDIP
CY74FCT823ATQCT SSOP
CY74FCT823ATQCTG4 SSOP
CY74FCT823ATSOC SOIC
CY74FCT823ATSOCE4 SOIC
CY74FCT823ATSOCG4 SOIC
CY74FCT823ATSOCT SOIC
CY74FCT823ATSOCTE4 SOIC
CY74FCT823ATSOCTG4 SOIC
CY74FCT823BTPC PDIP
CY74FCT823BTPCE4 PDIP
CY74FCT823CTQCT SSOP
CY74FCT823CTQCTE4 SSOP
CY74FCT823CTQCTG4 SSOP
CY74FCT823CTSOC SOIC
CY74FCT823CTSOCE4 SOIC
CY74FCT823CTSOCG4 SOIC
CY74FCT823CTSOCT SOIC
CY74FCT823CTSOCTE4 SOIC
CY74FCT823CTSOCTG4 SOIC




CY74FCT823T Pinout, Pinouts
CY74FCT823T pinout,Pin out
This is one package pinout of CY74FCT823T,If you need more pinouts please download CY74FCT823T's pdf datasheet.

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CY74FCT823T Application Notes CY74FCT823T RoHS CY74FCT823T Circuits CY74FCT823T footprint
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