32K X 8/9 Synchronous Dual-Port Static RAM

The CY7C09079A and CY7C09179A are high-speed synchro- nous CMOS 32k x 8/9 dual-port static RAMs. Two ports are provided, permitting independent, simultaneous access for [3] reads and writes to any location in memory. Registers on control, address, and data lines allow for minimal set-up and hold times. In pipelined output mode, data is registered for [1] decreased cycle time. Clock to data valid t = 6.5 ns (pipe- CD2 lined). Flow-through mode CAN also be used to bypass the pipelined output Register to eliminate access latency. In flow- through mode data will be available t = 15 ns after the CD1 address is clocked into the device. Pipelined output or flow- through mode is selected via the FT/Pipe pin. By Cypress Semiconductor Corp.
CY7C09179A 's PackagesCY7C09179A 's pdf datasheet
CY7C09079A-6AC
CY7C09079A-7AC
CY7C09079A-9AC
CY7C09079A-12AC
CY7C09179A-6AC
CY7C09179A-7AC
CY7C09179A-9AC
CY7C09179A-12AC
CY7C09079A




CY7C09179A Pinout, Pinouts
CY7C09179A pinout,Pin out
This is one package pinout of CY7C09179A,If you need more pinouts please download CY7C09179A's pdf datasheet.

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