9-Mbit (256K X 32) Pipelined DCD Sync SRAM

The CY7C1368C SRAM integrates 256K x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit Counter for internal burst operation. All synchronous inputs are gated by Registers controlled by a positive-edge-triggered Clock Input (CLK). The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable [2] (CE ), depth-expansion Chip Enables (CE and CE ), Burst 1 2 3 Control inputs (ADSC, ADSP, and ADV), Write Enables (BW , A BW , BW , BW , and BWE), and Global Write (GW). B C D Asynchronous inputs include the Output Enable (OE) and the ZZ pin. By Cypress Semiconductor Corp.
CY7C1368C 's PackagesCY7C1368C 's pdf datasheet
CY7C1368C-166AXC
CY7C1368C-166AJXC
CY7C1368C-166AXI
CY7C1368C-166AJXI
CY7C1368C-200AXC
CY7C1368C-200AJXC
CY7C1368C-200AXI
CY7C1368C-200AJXI
CY7C1368C-250AXC
CY7C1368C-250AJXC
CY7C1368C-250AXI
CY7C1368C-250AJXI




CY7C1368C Pinout, Pinouts
CY7C1368C pinout,Pin out
This is one package pinout of CY7C1368C,If you need more pinouts please download CY7C1368C's pdf datasheet.

CY7C1368C circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

Related Electronics Part Number

Related Keywords:

CY7C1368C Pb-Free CY7C1368C Cross Reference CY7C1368C Schematic CY7C1368C Distributor
CY7C1368C Application Notes CY7C1368C RoHS CY7C1368C Circuits CY7C1368C footprint
Hot categories