FullFlex? Synchronous SDR Dual-Port SRAM

The FullFlex, Dual-Port SRAM families consist of 4-Mbit, 9-Mbit, 18-Mbit, and 36-Mbit synchronous, true dual-port static RAMs that are high-speed, low-power 1.8V/1.5V CMOS. Two ports are provided, allowing the array to be accessed simulta- neously. Simultaneous access to a location triggers determin- istic access control. For FullFlex72 these ports CAN operate independently with 72-bit bus widths and each port CAN be independently configured for two pipelined stages. Each port CAN also be configured to operate in pipelined or flow-through mode. Advanced features include built-in deterministic access control to manage address collisions during simultaneous access to the same memory location, Variable Impedance Matching (VIM) to improve data transmission by matching the output driver impedance to the line impedance, and echo Clocks to improve data transfer. By Cypress Semiconductor Corp.