2.5V Or 3.3V, 200-MHz 1:18 Clock Distribution Buffer

The CY29940-1 is a low-voltage 200-MHz Clock Distribution Buffer with the capability to select either a differential LVPECL- or a LVCMOS/LVTTL-compatible input Clock The two Clock sources CAN be used to provide for a test Clock as well as the primary system Clock All other control inputs are LVCMOS/LVTTL-compatible. The eighteen outputs are 2.5V or 3.3V LVCMOS/LVTTL-compatible and CAN drive 50, series or parallel terminated transmission lines. For series terminated transmission lines, each output CAN drive one or two traces giving the device an effective fanout of 1:36. Low output-to-output skews make the CY29940-1 an ideal Clock distribution Buffer for nested Clock trees in the most demanding of synchronous systems. By Cypress Semiconductor Corp.
CY29940-1 's PackagesCY29940-1 's pdf datasheet

CY29940-1 Pinout, Pinouts
CY29940-1 pinout,Pin out
This is one package pinout of CY29940-1,If you need more pinouts please download CY29940-1's pdf datasheet.

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