• Product pinout
  • Description
  • PCK2111,PCK2111 1:10 LVDS Clock Distribution Device
  • The PCK2111 is a low skew programmable 1:10 LVDS clock distribution device. The selected input signal is fanned out to 10 identical differential outputs. The PCK2111 features an 11-bit Shift Register with a serial-in and a Control Register. The purpose of ...
  • PCK3807A,PCK3807A 1:10 LVTTL Clock Distribution Device
  • This low skew clock driver offers 1:10 fan-out. The large fan out from a single input reduces loading on the preceding driver and provides an efficient Clock Distribution network. The PCK3807A offers low capacitance inputs with hysteresis for improved noise ...
  • SY100EL15L,SY100EL15L 3.3V 1:4 Clock Distribution IC
  • The SY100EL15L is a low skew 1:4 Clock Distribution IC designed explicitly for low skew Clock Distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. If a ...
  • SY100EL14V,SY100EL14V 5V/3.3V 1:5 Clock Distribution
  • The SY100EL14V is a low skew 1:5 Clock Distribution chip designed explicitly for low skew Clock Distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The ...
  • SY100S815,SY100S815 SINGLE SUPPLY QUAD PECL/TTL-TO-PECL
  • The SY100S815 is a low skew 1-to-4 PECL differential driver designed for Clock Distribution in new, high- performance PECL systems. It accepts either a PECL clock input or a TTL input by using the TTL enable pin TEN. When the TTL enable pin is HIGH, the ...
  • CY29940,2.5V Or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer
  • The CY29940 is a low-voltage 200-MHz Clock Distribution buff- er with the capability to select either a differential LVPECL or a LVCMOS/LVTTL compatible input clock. The two clock sources can be used to provide for a test clock as well as the primary ...
  • CY29948,2.5V Or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer
  • The CY29948 is a low-voltage 200-MHz Clock Distribution buffer with the capability to select either a differential LVPECL or a LVCMOS/LVTTL compatible input clock. The two clock sources can be used to provide for a test clock as well as the primary system ...
  • CY2303,Phase-Aligned Clock Multiplier
  • The CY2303 is a 3 output 3.3V phase-aligned system clock designed to distribute high-speed clocks in PC, workstation, datacom, telecom, and other high-performance applications. ...
  • CY29942,2.5V Or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer
  • The CY29942 is a low-voltage 200-MHz Clock Distribution buffer with an LVCMOS or LVTTL compatible input clock. All other control inputs are LVCMOS/LVTTL compatible. The eighteen outputs are 2.5V or 3.3V LVCMOS or LVTTL compatible and can drive 50, series ...
  • CY29946,2.5V Or 3.3V, 200-MHz, 1:10 Clock Distribution Buffer
  • The CY29946 is a low-voltage 200-MHz Clock Distribution buffer with the capability to select one of two LVCMOS/LVTTL compatible input clocks. These clock sources can be used to provide for test clocks as well as the primary system clocks. All other control ...
  • CY29949,2.5V Or 3.3V 200-MHz 1:15 Clock Distribution Buffer
  • The CY29949 is a low-voltage 200-MHz Clock Distribution buffer with the capability to select either a differential LVPECL or LVCMOS/LVTTL compatible input clocks. These clock sources can be used to provide for test clocks as well as the primary system ...
  • CY29940-1,2.5V Or 3.3V, 200-MHz 1:18 Clock Distribution Buffer
  • The CY29940-1 is a low-voltage 200-MHz Clock Distribution buffer with the capability to select either a differential LVPECL- or a LVCMOS/LVTTL-compatible input clock. The two clock sources can be used to provide for a test clock as well as the primary ...
  • IMIB9948,3.3V, 160-MHz, 1:12 Clock Distribution Buffer
  • The B9948 is a low-voltage Clock Distribution buffer with the capability to select either a differential LVPECL or a LVC- MOS/LVTTL compatible input clock. The two clock sources can be used to provide for a test clock as well as the primary system clock. ...
  • 74FCT388915T,8 Output PLL Clock Generator W/3-State
  • The FCT388915T uses phase-lock loop technology to lock the fre- quency and phase of outputs to the input reference clock. It provides low skew Clock Distribution for high performance PCs and workstations. One of the outputs is fed back to the PLL at the ...
  • PI90LVB16,1:6 Differential To LVTTL Clock/Data Distribution
  • PI90LVB16 is a six-channel LVTTL Clock Distribution driver with 50 picosecond channel-to-channel skew. It translates one BLVDS (Bus Low-Voltage Differential Signaling) input signal into six LVTTL- compatible output signals for distribution to adjacent chips ...
  • PI90LV14,1:5 Clock Distribution
  • The PI90LV14 implements low voltage differential signaling (LVDS) to achieve clocking rates as high as 320MHz with low skew. The PI90LV14 is a low-skew 1:5 Clock Distribution chip which incorporates multiplexed clock inputs to allow for distribution of ...