The PLL section consists of a programmable reference divider, R; a low-noise phase frequency detector, PFD; a precision charge pump, CP; and a programmable feedback divider, N. By connecting an external VCXO or VCO to the CLK2 and CLK2B pins, PLL output ...
The AD9511 provides a multi-output Clock Distribution function along with an on-chip PLL core. The design emphasizes low jitter and low phase noise in order to maximize data converter clocking performance. Three independent LVPECL and two LVDS clock outputs ...
The AD9512 provides a multi-output Clock Distribution function for input signals up to 1.6 GHz. The design emphasizes low jitter and low phase noise in order to maximize data converter clocking performance.
Three independent LVPECL and two LVDS clock ...
The AD9513 features a three-output Clock Distribution IC in a
design that emphasizes low jitter and phase noise to maximize
data converter performance. Other applications with
demanding phase noise and jitter requirements also benefit
from this part.
The AD9514 features a multi-output Clock Distribution IC in a design that emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part.
The AD9515 features a two-output Clock Distribution IC in a design that emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part.
The PCK2111 is a low skew programmable 1:10 LVDS clock
distribution device. The selected input signal is fanned out to 10
identical differential outputs.
The PCK2111 features an 11-bit Shift Register with a serial-in and a
Control Register. The purpose of ...
The PCK351 is a high-performance 3.3 V LVTTL Clock Distribution device. The PCK351
enables a single clock input to be distributed to ten outputs with minimum output skew and
pulse skew. The use of distributed VCC and GND pins in the PCK351 ensures ...
This low skew clock driver offers 1:10 fan-out. The large fan out from
a single input reduces loading on the preceding driver and provides
an efficient Clock Distribution network. The PCK3807A offers low
capacitance inputs with hysteresis for improved noise ...
The SY100EL15L is a low skew 1:4 Clock Distribution
IC designed explicitly for low skew Clock Distribution
applications. The device can be driven by either a
differential or single-ended ECL or, if positive power
supplies are used, PECL input signal. If a ...
The SY100EL14V is a low skew 1:5 Clock Distribution chip designed explicitly for low skew Clock Distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The ...
The SY100S815 is a low skew 1-to-4 PECL differential
driver designed for Clock Distribution in new, high-
performance PECL systems. It accepts either a PECL
clock input or a TTL input by using the TTL enable pin TEN.
When the TTL enable pin is HIGH, the ...
The CY29940 is a low-voltage 200-MHz Clock Distribution buff-
er with the capability to select either a differential LVPECL or
a LVCMOS/LVTTL compatible input clock. The two clock
sources can be used to provide for a test clock as well as the
primary ...
The CY29948 is a low-voltage 200-MHz Clock Distribution
buffer with the capability to select either a differential LVPECL
or a LVCMOS/LVTTL compatible input clock. The two clock
sources can be used to provide for a test clock as well as the
primary system ...
The CY2303 is a 3 output 3.3V phase-aligned system clock
designed to distribute high-speed clocks in PC, workstation,
datacom, telecom, and other high-performance applications. ...
The CY29942 is a low-voltage 200-MHz Clock Distribution
buffer with an LVCMOS or LVTTL compatible input clock. All
other control inputs are LVCMOS/LVTTL compatible. The
eighteen outputs are 2.5V or 3.3V LVCMOS or LVTTL
compatible and can drive 50, series ...
The CY29946 is a low-voltage 200-MHz Clock Distribution
buffer with the capability to select one of two LVCMOS/LVTTL
compatible input clocks. These clock sources can be used to
provide for test clocks as well as the primary system clocks.
All other control ...
The CY29949 is a low-voltage 200-MHz Clock Distribution
buffer with the capability to select either a differential LVPECL
or LVCMOS/LVTTL compatible input clocks. These clock
sources can be used to provide for test clocks as well as the
primary system ...
The CY29940-1 is a low-voltage 200-MHz Clock Distribution
buffer with the capability to select either a differential LVPECL-
or a LVCMOS/LVTTL-compatible input clock. The two clock
sources can be used to provide for a test clock as well as the
primary ...
The B9948 is a low-voltage Clock Distribution buffer with the
capability to select either a differential LVPECL or a LVC-
MOS/LVTTL compatible input clock. The two clock sources
can be used to provide for a test clock as well as the primary
system clock. ...
Low Voltage LVPECL/LVCMOS-input LVCMOS-output 250-MHz 1:18 Clock Distribution Chip
MPC9109 2.5 V or 3.3 V LVCMOS compatible and feature the drive strength to drive 50 ,
series or parallel terminated transmission lines. With output-to-output skews of
200 ...
The MPC940L is a 1:18 low voltage Clock Distribution chip with 2.5 V or 3.3 V LVCMOS
output capabilities. The device features the capability to select either a differential
LVPECL or an LVCMOS compatible input. The 18 outputs are 2.5 V or 3.3 V LVCMOS ...
The MPC941 is a 1:27 low voltage Clock Distribution chip. The device features
the capability to select either a differential LVPECL or an LVCMOS compatible
input. The 27 outputs are LVCMOS compatible and feature the drive strength to
drive 50 , series or ...
The MPC942 is a 1:18 low voltage Clock Distribution chip with 2.5V or
3.3V LVCMOS output capabilities. The device is offered in two versions;
the MPC942C has an LVCMOS input clock while the MPC942P has a
LVPECL input clock. The 18 outputs are 2.5V or 3.3V ...
The MPC942 is a 1:18 low voltage Clock Distribution chip with 2.5V or
3.3V LVCMOS output capabilities. The device is offered in two versions;
the MPC942C has an LVCMOS input clock while the MPC942P has a
LVPECL input clock. The 18 outputs are 2.5V or 3.3V ...
The FCT388915T uses phase-lock loop technology to lock the fre-
quency and phase of outputs to the input reference clock. It provides low
skew Clock Distribution for high performance PCs and workstations. One of
the outputs is fed back to the PLL at the ...
The FCT88915TT uses phase-lock loop technology to lock the frequency
and phase of outputs to the input reference clock. It provides low skew clock
distribution for high performance PCs and workstations. One of the outputs is
fed back to the PLL at the ...
The MPC9443 is a 2.5V and 3.3V compatible 1:16 Clock Distribution
buffer designed for low-voltage high-performance telecom, networking
and computing applications. The device supports 3.3V, 2.5V and dual
supply voltage (mixed-voltage) applications. The ...
PI90LVB16 is a six-channel LVTTL Clock Distribution driver with 50
picosecond channel-to-channel skew. It translates one BLVDS
(Bus Low-Voltage Differential Signaling) input signal into six LVTTL-
compatible output signals for distribution to adjacent chips ...
The SY89546U is a precision, high-speed 4:1 differential
multiplexer that provides two copies of the selected input.
The high speed LVDS (350mV) compatible outputs with a
guaranteed throughput of up to 3.2Gbps over temperature
and voltage.
The SY89546U ...
The PI90LV211 implements low voltage differential signaling (LVDS)
to achieve clocking rates as high as 320 MHz with low skew. The
PI90LV211 is a low skew 1:6 fanout device designed explicitly for low
skew Clock Distribution applications. The device ...
The PI90LV14 implements low voltage differential signaling (LVDS)
to achieve clocking rates as high as 320MHz with low skew.
The PI90LV14 is a low-skew 1:5 Clock Distribution chip which
incorporates multiplexed clock inputs to allow for distribution of ...
