32-bit Parallel Error Detection And Correction Circuit - National Semiconductor

The DP8406 device is a 32-bit parallel error detection and correction circuit (EDAC) in a 52-pin or 68-pin package. The EDAC uses a modified Hamming code to generate a 7-bit check word from a 32-bit data word. This check word is stored along with the data word during the memory write cycle. During the memory read cycle, the 39-bit words from memory are processed by the EDAC to determine if errors have occurred in memory. Single-bit errors in the 32-bit data word are flagged and cor- rected. Single-bit errors in the 7-bit check word are flagged, and the CPU sends the EDAC through the correction cycle even though the 32-bit data word is not in error. The correction cycle will simply pass along the original 32-bit data word in this case and produce error syndrome bits to pinpoint the error-generating location. Dual-bit errors are flagged but not corrected. These errors may occur in any two bits of the 39-bit word from memory (two errors in the 32-bit data word, two errors in the 7-bit check word, or one error in each word). The gross-error condition of all LOWs or all HIGHs from memory will be detected. Otherwise, errors in three or more bits of the 39-bit word are beyond the capabilities of these devices to detect. By National Semiconductor Corporation
DP8406 's PackagesDP8406 's pdf datasheet



DP8406 Pinout, Pinouts
DP8406 pinout,Pin out
This is one package pinout of DP8406,If you need more pinouts please download DP8406's pdf datasheet.

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