1,7 Encoder/decoder Circuit

The DP84902 is designed to perform the encoding and de- coding for disk memory systems. It is designed to Interface directly with Integrated Read Channel Products (such as National Semiconductors DP84910 and with Disk Data Controller Products with a 2-bit NRZ Interface (such as Na- tional Semiconductors Advanced Disk Controllers). This Encoder/Decoder (ENDEC) circuit employs a 2/3 (1,7) Run Length Limited (RLL) code type and supports the hard sec- tored format. The DP84902 has the option of selecting either TTL or ECL compatible code output to Interface with preamplifiers com- monly used in high data rate applications. This is accomm- plished by the setting of a bit in the control Register The ENDEC also includes write data precompensation con- trol circuitry which detects the need for write precompensa- tion. This circuitry issues early and late output signals nec- essary for precompensation. The precompensation informa- tion is generated against a 2T pattern. The precompensa- tion circuitry CAN be bypassed by the setting of a bit in the control Register A control reigster is included to configure the ENDEC and to select device operation options such as output code inver- sion, differential code output, bypassing of the encoder, and the use of an internal write Clock By National Semiconductor Corporation