Single/Dual/Quad/Octal TDM-Over-Packet Chip

The IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34T108 allows up to eight T1/E1 links or frame-based serial HDLC links to be transported transparently through a switched IP or MPLS packet network. Jitter and wander of recovered Clocks conform to G.823/G.824, G.8261, and TDM specifications. This eliminates the need for remote Timing sources in cabinets and pedestals. The Ethernet side of the DS34T108 provides high QoS capabilities to its MII/RMII/SSMII port, while the WAN side supports full-featured T1/E1 framers and LIUs. This takes the solution all the way through Analog while preserving options to make use of TDM streams at key intermediate points. The high level of By Maxim Integrated Products